Skip to content

Commit 75c7e49

Browse files
p-wojadrabarek
authored andcommitted
[#59539] riscv: Allow sret from machine mode
1 parent 250e578 commit 75c7e49

File tree

1 file changed

+2
-2
lines changed

1 file changed

+2
-2
lines changed

arch/riscv/op_helper.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -825,7 +825,7 @@ void riscv_set_mode(CPUState *env, target_ulong newpriv)
825825

826826
target_ulong helper_sret(CPUState *env, target_ulong cpu_pc_deb)
827827
{
828-
if (env->priv != PRV_S) {
828+
if (env->priv < PRV_S) {
829829
tlib_printf(LOG_LEVEL_ERROR, "Trying to execute Sret from privilege level %u", env->priv);
830830
helper_raise_illegal_instruction(env);
831831
}
@@ -862,7 +862,7 @@ target_ulong helper_sret(CPUState *env, target_ulong cpu_pc_deb)
862862

863863
target_ulong helper_mret(CPUState *env, target_ulong cpu_pc_deb)
864864
{
865-
if (env->priv != PRV_M) {
865+
if (env->priv < PRV_M) {
866866
tlib_printf(LOG_LEVEL_ERROR, "Trying to execute Mret from privilege level %u", env->priv);
867867
helper_raise_illegal_instruction(env);
868868
}

0 commit comments

Comments
 (0)